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The 5th International Workshop on Spintronics Memory and Logic

TIME:2023-09-01   BROWSE:

With Moore's law ending, the semiconductor industry shifts due to power challenges, fostering exploration of new tech to bridge the power gap. Spintronics emerges as a post-Moore option. Since discovering the Giant Magneto-Resistance (GMR) effect in 1988, spintronics has rapidly evolved, impacting daily life and expanding from hard-disk read heads to microelectronics, including sensors, memories, and processors. Notably, Samsung, Globalfoundries, and TSMC entered eSTT-MRAM production in 2018, exemplified by Magnetic Random Access Memory (MRAM). Beihang University's "Ultra-low Power Spintronic Memory and Logic" project, part of "National Plan 111" addresses power inefficiency in traditional circuits. This interdisciplinary effort covers materials, devices, circuits, and architectures, aiming for ultra-low power spintronic memory and logic.

The 5th International Workshop on Spintronics Memory and Logic (SML) will be held from Oct.18th to Oct.21st 2023 in Beihang University, Beijing, China. It will focus on new spintronic topics such as stochastic spintronic devices, ferromagnetic/antiferromagnetic systems, spintronic-photonic integration, terahertz device, hydrodynamic spintronics and current vortex, spintronic Ising machines, dynamic detetction of SOTs and so on.

SML 2023 Management Committee:

Weisheng Zhao, General co-chair, Beihang University, Beijing

Albert Fert, General co-chair, Paris-Saclay University, Paris

Yoshichika Otani, General co-chair, University of Tokyo, Tokyo

Confirmed Invited speakers:

Albert Fert (Paris-Saclay University)

Bert Koopmans (Eindhoven University of Technology)

Chih-Huang Lai (National Tsing Hua University)

Gerrit Bauer (KITS/UCAS)

Giovanni Finocchio (University of Messina)

Grégory Malinowski (University of Lorraine)

Henri Jaffrès (CNRS/Thales)

Hyunsoo Yang (National University of Singapore)

Jason Robinson (University of Cambridge)

Jérémy Théo Letang (Magnetic Microsystem Technologies)

Jingsheng Chen (National University of Singapore)

Johan Åkerman (University of Gothenburg)

Jörg Wunderlich (University of Regensburg)

Kevin Garello (Grenoble Alpes University)

Lin Chen (Technical University of Munich)

Madjid Anane (Paris-Saclay University)

Mathias Kläui (University of Mainz)

Nicolas Vernier (Paris-Saclay University)

Pietro Gambardella (ETH Zurich)

Sadamichi Maekawa (RIKEN Center for Emergent Matter Science)

Shufeng Zhang (University of Arizona)

Shunsuke Fukami (Tohoku University)

Stéphane Mangin (University of Lorraine)

Tobias Kampfrath (University of Berlin)

Yoshichika Otani (The University of Tokyo)

Hosted by:

National Plan 111 project with Ultra-low Power Spintronic Memory and Logic;

Joint-Organizers:

School of Integrated Circuit Science and Engineering, Beihang University

Fert Beijing Institute, Beihang University

National Key Laboratory of Spintronics

Beihang University Press

Date: Oct 18th - Oct 21st, 2023

Workshop Venue: New Main Building Conference Center of Beihang University

Registration Date: Oct 18th - Oct 20th, 2023, 7:30-17:00

Registration Venue: Vision Hotel Beijing (No.39 Xueyuan Road, Haidian District, Beijing)

Contact us:

Sai Li (Speaker Affairs)

saili@buaa.edu.cn

Xinran Wang (Local Affairs)

xinran_wang@buaa.edu.cn

Wenlong Cai (Registration Affairs)

caiwenlong1993@buaa.edu.cn

Copyright © 2018 Beihang University microelectronics college. All rights reserved. Address: No. 37 Xueyuan Road, Haidian District, Beijing, P.R. China, 100083.

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